Electronic circuits that divide the frequency of an input clock signal and create an output clock signal with a lower frequency are generally called clock dividers. Clock dividers may be used in a number of applications; at least some of these applications require the output signal to have a fifty percent duty cycle in which the duration of the pulse is half the pulse period. An output signal with a fifty percent duty cycle is generally easier to produce when the input clock is divided by an even integer rather than by an odd integer. A clock divider that is able to provide more flexibility in the choice of divisors may result in a greater ability to reuse existing components in new circuits.